1. Technical Field
Exemplary embodiments relate generally to semiconductor memory devices, and more particularly to methods of controlling reclaim of nonvolatile memory devices, methods of operating storage devices and storage devices.
2. Discussion of the Related Art
A semiconductor memory device is a storage device which is fabricated using semiconductors such as, but not limited to, silicon (Si), germanium (Ge), gallium arsenide (GaAs), and indium phosphide (InP). Semiconductor memory devices may be typically classified into a volatile memory and a nonvolatile memory.
The volatile memory may lose contents stored therein at power-off. The volatile memory includes the following: a static RAM (SRAM), a dynamic RAM (DRAM), and a synchronous DRAM (SDRAM). The nonvolatile memory may retain stored contents even at power-off. The nonvolatile memory includes the following: a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory, a phase-change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), and a ferroelectric RAM (FRAM).
The flash memory may be used in various fields thanks to the following advantages such as a mass storage, low noise, and low power. To increase storage capacity, the flash memory is formed of a multi-level cell which is capable of storing at least two or more bits of data per cell. For example, at least two or more data bits are stored in one memory cell using an increased number of program states, so a read margin between two adjacent program states is reduced. The flash memory having such reduced read margin creates error bits in data generated in a read operation.
In addition, data read from memory cells may include error bits due to physical factors such as program disturbance and read disturbance generated by adjacent memory cells due to fabrication scaling. Such error bits may be corrected using error correcting methods such as an error correction code (ECC) operation. However, it may be useful to detect degraded memory cells even when there are no errors after the ECC operation is performed.